One of the problems with Flash is that it is still a “hot” technology. It’s an exciting technology and is often advertised and promoted in ways that shun detail in preference for talking about blazing speed and performance. It’s not unusual for a typical enterprise flash advert to look more like a sports car ad than a disk array ad.

This is great for awareness but the downside is that it becomes easy to be duped into thinking that flash is fast and the major decision should be around all flash or hybrid.

The reality is that the devil really is in the details. Unfortunately, the detail is the part that’s a little less exciting and “hot”; but if you really want the best storage to support the needs of your application, then the detail really is important to look at.

As an example, no-one doubts that flash is fast - and using an “apples to apples” comparison - flash is much faster than spinning disk. However, there are many components in a disk array that affect performance, and the disk themselves albeit important are only one factor. If the architecture of your disk array was not designed from the ground up to support flash, then it is logical to assume that the array components themselves could end up being a bottleneck; ultimately slowing down performance.

As an example: many hybrid arrays use an architecture designed for spinning disk and adapted to accommodate flash. The result is the full performance of flash cannot truly be realised.
The little things really matter.  As an example, if you look at HPE’s 3PAR flash offerings you will see key features such as their unique ASIC (application specific integrated circuit).  No-one can really get excited about something as technical as an ASIC, but these apparently small technical components are the things that make the difference between flash performing at full potential or not.

What’s so special about the 3PAR ASIC? First it’s genuinely designed and engineered for solid state performance. This translates to 5x better bandwidth. It is also designed to process workloads evenly across nodes in a scale out architecture. This translates to getting every bit of performance out of every storage node. It has been designed to deliver inline deduplication to drive storage efficiency but with minimum impact on performance. 

All of this leads to an important fact, the ASIC enables you to get full potential from the flash.

Ultimately you need to understand what performance you need and then select the right flash array based on that need. For example, if continued performance as you scale is important, then the hot feature you should be looking for isn’t the flash, anyone can give you that; it would be the 3PAR ASIC.